Product Summary

The FX604P3 is a low power CMOS integrated circuit for the reception or transmission of asynchronous 1200bits/sec data in accordance with CCITT V.23 and ETSI specifications. The FX604P3 is also capable of generating the 75bits/sec back channel. The FX604P3 incorporates an optional Tx and Rx data retiming function that removes the need for a UART in the associated mC when operating at 1200bits/sec. The FX604P3 can disable the back channel or be operated so only the mark or space tone is produced. An optional line equaliser is incorporated into the receive path, this is controlled by an external logic level.

Parametrics

FX604P3 absolute maximum ratings: (1)Supply (VDD - VSS): -0.3 to 7.0 V; (2)Voltage on any pin to VSS: -0.3 to VDD + 0.3 V; (3)Current into or out of VDD and VSS pins: -30 to +30 mA; (4)Current into or out of any other pin: -20 to +20 mA.

Features

FX604P3 features: (1)Optional 75bits/sec Back Channel; (2)Optional Line Equalisation; (3)Optional 1200bits/sec Data Retiming Facility; (4)-40℃ to +85℃ Operating Temperature; (5)3.58MHz Xtal/Clock Rat; (6)16-pin SOIC and DIP Packages; (7)3.0 to 5.5V Supply; 1.0mA typ at 3V Zero-Power Mode; 1mA typ; (8)Conforms to relevant sections of V23 and ETSI specifications.

Diagrams

FX604P3 block diagram

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FX604P3
FX604P3

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